A techno-freak, with interests in a variety of fields from the mind-boggling to the mundane. A perfectionist to the core. An optimist with a kool mind even in difficult times. Capable of accomplishing tasks of utmost complexity and skill.

SHIVSHANKAR VENUGOPAL 

Objective

To pursue a career in the field of circuit design/testing, to utilize my skills and contribute effectively to the group while furthering my knowledge and refining my skills.

Education

  • Masters of Science in Engineering, Electrical Engineering, Ira A. Fulton School of Engineering, Arizona State University. GPA (3.39). Graduation Date: December 2007.
  • Bachelor of Engineering, Electrical and Electronics Engineering, Anna University, Chennai, India.  Passed in First Class with Distinction (80.02%). Graduation Date: June 2005.

Relevant Course Work/Academic Projects

  • A/D Converter Design: Design of Flash, 10-bit RSD Pipelined A/D converters and the complete design and characterization of a Telescopic Cascode Operational Transconductance Amplifier.
  • Electromagnetic Mass Propulsion System: To emphasize the use of Electro-Magnetics in ballistics and space propulsion systems, a 2.5 kVA rail gun system was designed. A 6V-800V Buck-Boost (Fly back) Converter based Capacitor bank charging circuit was designed. The Accelerating Coil was designed with the help of EM Field simulation software. Wide ranging concepts from Power Electronics, EM Field mechanics, and Control systems were employed to achieve a highly efficient and optimized design.
  • Verilog design project: A fully synthesizable SOC implementation of Digital Controller for Treadmill with PWM control, Display driver, Card Reader, Customizable Program Generator, Heart Rate Controller and other features. The design and simulation was done using Cadence Verilog XL, and the synthesis was done using Synopsys Design Compiler.
  • Design of 16 Bit CORDIC Processor: Design of a circuit to convert rectangular to polar coordinates with minimum Energy Delay Product (EDP). Completed the schematic of a 16 bit hybrid adder (Brent-Kung and Ripple Carry), 16 bit log shifter and 16 bit latch using TSMC 0.24um deep submicron technology using Cadence Spectre. Also completed the layout of the circuit using Virtuoso and performed post layout simulation with a 10% noise margin.
  • C++ based Algorithm design: Developed C++ based algorithms for Power System Analysis, Artificial Neural Networks as part of undergraduate coursework.
  • Switched Capacitor Filter Design: Designed a Switched Capacitor based 6-pole Band-Pass filter used in the SAT and Wideband Data Channel of the MX598 chipset. Simulated the final design using SPECTRE RF.
  • Design of Experiments (DOE): Designed an experiment to identify and quantify the factors involved in material shrinkage and roughness under varied environmental exposure. The statistical software Design Expert was used extensively through out the design and analysis phase. 
  • Semiconductor Characterization: The course involved the study of the various methods, techniques, and principles involved in the estimation and experimental measurement of the semiconductor parameters like mobility, sheet resistance, capacitance, etc., as well as the study of process related characterization and instrumentation.

Relevant Coursework

  • Under graduation: Microcontroller based System design, Digital Signal Processing (DSP), Power System Analysis, Field Theory, Control Systems, and Transmission & Distribution.
  • Masters: Advanced/Analog Integrated Circuits, VLSI Design, Verilog HDL, A/D Converters, Computer Architecture, Switched Capacitor Circuit Design, Communication Systems

Software Skills

  • Scripting Languages: Perl/Regular Expressions, UNIX Shell Scripting, Web-scripting experience.
  • Operating Systems: Linux/UNIX, Windows.
  • Statistical Softwares: SAS, Design Expert, SPSS (Cluster/Regression/ANOVA), Excel VBA.
  • Programming Languages/Environments: C/C++, Java, and Visual Basic.
  • Hardware Description Languages: SPICE, Verilog.
  • EDA Software/Tools: Cadence Virtuoso tools, Synopsys tools, Spectre, Mentor ModelSim.
  • Engineering/Simulation Software: Matlab/Simulink, ANSYS, QuickField, MPLAB.

Relevant Work Experience / Internships

  • Graduate Research Associate, Arizona State University West, AZ, USA August 2006 till December 2007.

Work involving Data Analysis/Statistical Reporting using SPSS/SAS, Excel VBA for the US Department of Education funded project under Dr. Scott Ridley. Also was responsible for interacting with and maintaining project databases for the various school districts involved in the project, designing WebPages for education research surveys.

  • In-Plant Training, Bharath Heavy Electricals Limited (BHEL), High Voltage Division, Bangalore, India May 2004.

Practical training in the field of Power electronics, High voltage testing, and the design of DC-AC Static Power Converters for Electric traction engines.

Presentations / Activities

  • Student Member, IEEE Phoenix section.
  • Presented a seminar titled Computer Networks and internet Technologies at a workshop organized by ISTE Student Chapter, SRM Engineering College, Chennai, India.

Awards / Honors

  • Best Undergraduate Senior Project award for 2004-2005 of the Department of Electrical and Electronics Engineering, SRM Engineering College, Chennai, India.
  • Secured First Rank in the Department of Electrical and Electronics Engineering in the First Semester University Examinations.
  • Selected by Cognizant Technology Solutions (www.Cognizant.com) through Undergraduate Campus Recruitment. Underwent training in Software development process, Object-Oriented Programming, Database design, etc.,

References

(Available Upon Request).